347 lines
8.9 KiB
C
347 lines
8.9 KiB
C
// Raspberry Pi DMA utilities; see https://iosoft.blog for details
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//
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// Copyright (c) 2020 Jeremy P Bentham
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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//
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#include <stdint.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include <signal.h>
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#include <string.h>
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#include <sys/ioctl.h>
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#include <sys/mman.h>
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#include "rpi_dma_utils.h"
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// If non-zero, print debug information
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#define DEBUG 0
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// If non-zero, enable PWM hardware output
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#define PWM_OUT 0
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char *dma_regstrs[] = {"DMA CS", "CB_AD", "TI", "SRCE_AD", "DEST_AD",
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"TFR_LEN", "STRIDE", "NEXT_CB", "DEBUG", ""};
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char *gpio_mode_strs[] = {GPIO_MODE_STRS};
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// Virtual memory pointers to acceess GPIO, DMA and PWM from user space
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MEM_MAP pwm_regs, gpio_regs, dma_regs, clk_regs;
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// Use mmap to obtain virtual address, given physical
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void *map_periph(MEM_MAP *mp, void *phys, int size)
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{
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mp->phys = phys;
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mp->size = PAGE_ROUNDUP(size);
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mp->bus = (void *)((uint32_t)phys - PHYS_REG_BASE + BUS_REG_BASE);
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mp->virt = map_segment(phys, mp->size);
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return(mp->virt);
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}
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// Allocate uncached memory, get bus & phys addresses
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void *map_uncached_mem(MEM_MAP *mp, int size)
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{
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void *ret;
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mp->size = PAGE_ROUNDUP(size);
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mp->fd = open_mbox();
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ret = (mp->h = alloc_vc_mem(mp->fd, mp->size, DMA_MEM_FLAGS)) > 0 &&
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(mp->bus = lock_vc_mem(mp->fd, mp->h)) != 0 &&
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(mp->virt = map_segment(BUS_PHYS_ADDR(mp->bus), mp->size)) != 0
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? mp->virt : 0;
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printf("VC mem handle %u, phys %p, virt %p\n", mp->h, mp->bus, mp->virt);
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return(ret);
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}
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// Free mapped peripheral or memory
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void unmap_periph_mem(MEM_MAP *mp)
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{
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if (mp)
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{
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if (mp->fd)
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{
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unmap_segment(mp->virt, mp->size);
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unlock_vc_mem(mp->fd, mp->h);
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free_vc_mem(mp->fd, mp->h);
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close_mbox(mp->fd);
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}
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else
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unmap_segment(mp->virt, mp->size);
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}
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}
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// ----- GPIO -----
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// Set input or output with pullups
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void gpio_set(int pin, int mode, int pull)
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{
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gpio_mode(pin, mode);
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gpio_pull(pin, pull);
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}
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// Set I/P pullup or pulldown
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void gpio_pull(int pin, int pull)
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{
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volatile uint32_t *reg = REG32(gpio_regs, GPIO_GPPUDCLK0) + pin / 32;
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*REG32(gpio_regs, GPIO_GPPUD) = pull;
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usleep(2);
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*reg = pin << (pin % 32);
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usleep(2);
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*REG32(gpio_regs, GPIO_GPPUD) = 0;
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*reg = 0;
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}
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// Set input or output
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void gpio_mode(int pin, int mode)
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{
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volatile uint32_t *reg = REG32(gpio_regs, GPIO_MODE0) + pin / 10, shift = (pin % 10) * 3;
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*reg = (*reg & ~(7 << shift)) | (mode << shift);
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}
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// Set an O/P pin
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void gpio_out(int pin, int val)
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{
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volatile uint32_t *reg = REG32(gpio_regs, val ? GPIO_SET0 : GPIO_CLR0) + pin/32;
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*reg = 1 << (pin % 32);
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}
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// Get an I/P pin value
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uint8_t gpio_in(int pin)
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{
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volatile uint32_t *reg = REG32(gpio_regs, GPIO_LEV0) + pin/32;
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return (((*reg) >> (pin % 32)) & 1);
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}
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// Display the values in a GPIO mode register
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void disp_mode_vals(uint32_t mode)
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{
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int i;
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for (i=0; i<10; i++)
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printf("%u:%-4s ", i, gpio_mode_strs[(mode>>(i*3)) & 7]);
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printf("\n");
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}
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// ----- VIDEOCORE MAILBOX -----
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// Open mailbox interface, return file descriptor
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int open_mbox(void)
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{
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int fd;
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if ((fd = open("/dev/vcio", 0)) < 0)
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fail("Error: can't open VC mailbox\n");
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return(fd);
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}
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// Close mailbox interface
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void close_mbox(int fd)
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{
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if (fd >= 0)
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close(fd);
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}
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// Send message to mailbox, return first response int, 0 if error
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uint32_t msg_mbox(int fd, VC_MSG *msgp)
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{
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uint32_t ret=0, i;
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for (i=msgp->dlen/4; i<=msgp->blen/4; i+=4)
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msgp->uints[i++] = 0;
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msgp->len = (msgp->blen + 6) * 4;
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msgp->req = 0;
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if (ioctl(fd, _IOWR(100, 0, void *), msgp) < 0)
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printf("VC IOCTL failed\n");
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else if ((msgp->req&0x80000000) == 0)
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printf("VC IOCTL error\n");
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else if (msgp->req == 0x80000001)
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printf("VC IOCTL partial error\n");
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else
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ret = msgp->uints[0];
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#if DEBUG
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disp_vc_msg(msgp);
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#endif
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return(ret);
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}
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// Allocate memory on PAGE_SIZE boundary, return handle
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uint32_t alloc_vc_mem(int fd, uint32_t size, VC_ALLOC_FLAGS flags)
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{
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VC_MSG msg={.tag=0x3000c, .blen=12, .dlen=12,
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.uints={PAGE_ROUNDUP(size), PAGE_SIZE, flags}};
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return(msg_mbox(fd, &msg));
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}
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// Lock allocated memory, return bus address
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void *lock_vc_mem(int fd, int h)
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{
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VC_MSG msg={.tag=0x3000d, .blen=4, .dlen=4, .uints={h}};
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return(h ? (void *)msg_mbox(fd, &msg) : 0);
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}
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// Unlock allocated memory
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uint32_t unlock_vc_mem(int fd, int h)
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{
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VC_MSG msg={.tag=0x3000e, .blen=4, .dlen=4, .uints={h}};
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return(h ? msg_mbox(fd, &msg) : 0);
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}
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// Free memory
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uint32_t free_vc_mem(int fd, int h)
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{
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VC_MSG msg={.tag=0x3000f, .blen=4, .dlen=4, .uints={h}};
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return(h ? msg_mbox(fd, &msg) : 0);
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}
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uint32_t set_vc_clock(int fd, int id, uint32_t freq)
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{
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VC_MSG msg1={.tag=0x38001, .blen=8, .dlen=8, .uints={id, 1}};
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VC_MSG msg2={.tag=0x38002, .blen=12, .dlen=12, .uints={id, freq, 0}};
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msg_mbox(fd, &msg1);
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disp_vc_msg(&msg1);
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msg_mbox(fd, &msg2);
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disp_vc_msg(&msg2);
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return(0);
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}
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// Display mailbox message
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void disp_vc_msg(VC_MSG *msgp)
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{
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int i;
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printf("VC msg len=%X, req=%X, tag=%X, blen=%x, dlen=%x, data ",
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msgp->len, msgp->req, msgp->tag, msgp->blen, msgp->dlen);
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for (i=0; i<msgp->blen/4; i++)
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printf("%08X ", msgp->uints[i]);
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printf("\n");
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}
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// ----- VIRTUAL MEMORY -----
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// Get virtual memory segment for peripheral regs or physical mem
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void *map_segment(void *addr, int size)
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{
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int fd;
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void *mem;
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size = PAGE_ROUNDUP(size);
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if ((fd = open ("/dev/mem", O_RDWR|O_SYNC|O_CLOEXEC)) < 0)
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fail("Error: can't open /dev/mem, run using sudo\n");
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mem = mmap(0, size, PROT_WRITE|PROT_READ, MAP_SHARED, fd, (uint32_t)addr);
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close(fd);
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#if DEBUG
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printf("Map %p -> %p\n", (void *)addr, mem);
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#endif
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if (mem == MAP_FAILED)
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fail("Error: can't map memory\n");
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return(mem);
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}
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// Free mapped memory
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void unmap_segment(void *mem, int size)
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{
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if (mem)
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munmap(mem, PAGE_ROUNDUP(size));
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}
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// ----- DMA -----
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// Enable and reset DMA
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void enable_dma(int chan)
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{
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*REG32(dma_regs, DMA_ENABLE) |= (1 << chan);
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*REG32(dma_regs, DMA_REG(chan, DMA_CS)) = 1 << 31;
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}
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// Start DMA, given first control block
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void start_dma(MEM_MAP *mp, int chan, DMA_CB *cbp, uint32_t csval)
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{
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*REG32(dma_regs, DMA_REG(chan, DMA_CONBLK_AD)) = MEM_BUS_ADDR(mp, cbp);
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*REG32(dma_regs, DMA_REG(chan, DMA_CS)) = 2; // Clear 'end' flag
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*REG32(dma_regs, DMA_REG(chan, DMA_DEBUG)) = 7; // Clear error bits
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*REG32(dma_regs, DMA_REG(chan, DMA_CS)) = 1|csval; // Start DMA
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}
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// Return remaining transfer length
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uint32_t dma_transfer_len(int chan)
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{
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return(*REG32(dma_regs, DMA_REG(chan, DMA_TXFR_LEN)));
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}
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// Check if DMA is active
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uint32_t dma_active(int chan)
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{
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return((*REG32(dma_regs, DMA_REG(chan, DMA_CS))) & 1);
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}
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// Halt current DMA operation by resetting controller
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void stop_dma(int chan)
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{
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if (dma_regs.virt)
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*REG32(dma_regs, DMA_REG(chan, DMA_CS)) = 1 << 31;
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}
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// Display DMA registers
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void disp_dma(int chan)
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{
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volatile uint32_t *p=REG32(dma_regs, DMA_REG(chan, DMA_CS));
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int i=0;
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while (dma_regstrs[i][0])
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{
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printf("%-7s %08X ", dma_regstrs[i++], *p++);
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if (i%5==0 || dma_regstrs[i][0]==0)
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printf("\n");
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}
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}
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// ----- PWM -----
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// Initialise PWM
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void init_pwm(int freq, int range, int val)
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{
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stop_pwm();
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if (*REG32(pwm_regs, PWM_STA) & 0x100)
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{
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printf("PWM bus error\n");
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*REG32(pwm_regs, PWM_STA) = 0x100;
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}
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#if USE_VC_CLOCK_SET
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set_vc_clock(mbox_fd, PWM_CLOCK_ID, freq);
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#else
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int divi=CLOCK_HZ / freq;
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*REG32(clk_regs, CLK_PWM_CTL) = CLK_PASSWD | (1 << 5);
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while (*REG32(clk_regs, CLK_PWM_CTL) & (1 << 7)) ;
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*REG32(clk_regs, CLK_PWM_DIV) = CLK_PASSWD | (divi << 12);
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*REG32(clk_regs, CLK_PWM_CTL) = CLK_PASSWD | 6 | (1 << 4);
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while ((*REG32(clk_regs, CLK_PWM_CTL) & (1 << 7)) == 0) ;
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#endif
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usleep(100);
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*REG32(pwm_regs, PWM_RNG1) = range;
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*REG32(pwm_regs, PWM_FIF1) = val;
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#if PWM_OUT
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gpio_mode(PWM_PIN, PWM_PIN==12 ? GPIO_ALT0 : GPIO_ALT5);
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#endif
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}
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// Start PWM operation
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void start_pwm(void)
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{
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*REG32(pwm_regs, PWM_CTL) = PWM_CTL_USEF1 | PWM_ENAB;
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}
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// Stop PWM operation
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void stop_pwm(void)
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{
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if (pwm_regs.virt)
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{
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*REG32(pwm_regs, PWM_CTL) = 0;
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usleep(100);
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}
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}
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// EOF
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